Built for engineers, researchers, and teams who want more than theory. Each program blends essential concepts with real ML-to-hardware workflows, covering every step from model training to optimized edge deployment.
Follow a single track or combine them depending on your context.
Foundational modules connecting ML concepts with real hardware constraints: memory, dataflow, and parallelism.
Entry levelYour first practical steps into ML-FPGA integration. Learn how a neural network becomes hardware and how compute blocks, DSPs, and on-chip memories shape performance.
BeginnerEnd-to-end workflow: training → optimization → IP core → firmware → deployment. Ideal for teams aiming to understand the complete ML-hardware path.
IntermediateDeep dive into performance-critical techniques: quantization, pruning, distillation, fusion, profiling, and hardware-aware benchmarking.
AdvancedA fully guided, practice-first program. Real FPGA boards, experiments, debugging sessions, and direct mentoring.
Cohort-based · IntensiveTwo intensive formats with different goals.
Learn the full ML-to-hardware workflow. FPGA is the final deployment target, not the main learning tool.
A fully hands-on FPGA experience. The board is the primary learning environment.